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微机原理_微处理器架构

The Microprocessor and Its Architecture

register

mode

paging

Register

general

specital

invisible

General-Purpose Registers / Multipurpose Registers

  • RAX (accumulator)

    • 低位改变不影响高位
    • 通常用于储存**乘数、除数、adjustment instructions、地址偏移

  • RBX (base index)

    • 有时用于储存偏移地址

  • RCX (count)

    • 也可以储存地址
    • 涉及循环、计数的命令用RCX
REP/REPE/REPNE
LOOP/LOOPD

  • RDX (data)

    • 乘法的积、除法的商
    • 也可以储存地址

  • RBP (base pointer)

    • 指向内存地址

  • RDI (destination index)

    • 字符命令目标地址

  • RSI (source index)

    • 字符命令源地址

  • R8 - R15

    • 只能用右边的n位：R8B,R8W,R8D,R8

Special-Purpose Registers

  • RIP(instruction pointer)

64位，40位总线，1T扁平地址空间

  • RSP(stack pointer)

  • RFLAGS / EFLAG / FLAG

    • C(carry):加法进位、减法借位
    • P(parity):奇偶校验，数有几个1
    • A(arxiliaty carry)?
    • Z(zero)
    • S(sign):正负数，指示最高位的0或1
    • T(trap):用来debug的
    • I(interrupt):是不是允许中断
    • D(direction0):1 – 自减；0 – 自加
    • O(overflow):加减溢出
    • IOPL(I/O privilege level):00最高，11最低
    • NT(nested task)？
    • RF(resume):调试用
    • VM（virual mode):在Windows系统下仿真DOS（我自己也不知道这是啥）
    • AC(algnment check)?
    • VIF(virtual interrupt)
    • VIP(virtual interrupt pending)
    • ID(identification): CPUID

  • Segment Rigisters

    • CS(code):代码段起始地址
    • DS(data):the beginning of the data segment
    • ES(extra): some of the string instructions to hold destination data
    • SS(stack): the beginning of the stack segment
    • FS and GS: allow two additional memory segments with no definition of usage

Program Invisible Registers

  • purpose: access the address of descriptor tables

  • cache(program-invisible portion of the segment registers): each time the content of the segment registers changes the microprocessor would get the corresponding descriptors and place it into the cache

  • GDTR / IDTR(global / interrupt descriptor table register): address and limit(16-bit)

  • TR(task register): store a descriptor to describe a procedure or application program

Mode

Protected Mode

Flat Mode

8084,8088: real mode – first 1M(real memory, conventional memory, DOS memory)

80286 and above: real or protected

Pentium 4 and Core2: no real mode operation

segment

all real mode memory address must consist of a segment address plus an offset address

  • segment size – 64KB(16 bits)
  • each segment register is internally appended with a 0H on its righmost end – 20 bits address – a segment can start at any location
  • high memory(0FFFF0H - 10FFEFH): for driver for DOS ---- (64K-16)B
  • modulo ---- control the addresses available within the area of a segment

Defalut Segment and Offset Register

  • CS:IP
  • SS:SP / SS:BP
  • DS:BX/DI/SI/direct number
  • ES:DI

in real mode, only the rightmost 16 bits of the extended register address a location within the memory segment, meaning that no larger than 64KB

Protected Mode

Selectors and Descriptors

  • two tables – each 8196 descriptors
  • global descriptor / system descriptor
  • local descriptor / application descriptor
  • format
    • base address – 24 bits / 32 bits(80386 and above)
    • limit – 16 bits / 20 bits(80386 and above) – the offset of the last address in the segment
    • G ---- if G=1, then the segment size becomes 4GB and the step becomes 4KB (means multiplied by 4K/limit <- limit FFFH)
    • L ---- L=1 -> 64-bit extension / L=0 -> 32-bit compatibility mode
    • AV ---- available(1) or not(0)
    • accress rights byte — growth direction, write accress …(note:64-bit mode only has code segment)

Flat Mode Memory

  • CS – descriptor
  • only code segment

Segment Register in Protected Mode

  • selector – 13 bits – choose descriptor
  • TI — global(0), local(1)
  • RPL(requested privilege level) — 11最低 — 于segment privilege level比较进行访问控制

Memory Paging

Paging Registers (operating system)

  • provide 2G linear address space, no matter there is enough or not

CR0

  • PG – 1->paging;0-> no paging

CR3

  • PWT ?
  • PCD ?

address format

  • page directory entry
  • page table entry
  • memory page offset address
  • TLB(translation look-aside buffer)